This application claims the benefit of priority to Korean Patent Application No. 10-2004-0118072, filed on Dec. 31, 2004, herein incorporated by reference.
1. Field of the Invention
The present invention relates to devices and methods for providing improved image quality, including the use of liquid crystal (LC) panels and liquid crystal display devices (LCD). The devices and methods of the present invention can improve image quality by preventing formation of imaging defects.
2. Description of the Related Art
An active matrix LCD displays an image by controlling light transmittance of LC panels by using thin film transistors (TFTs) as switching devices. Since an LCD can be made small compared with a cathode ray tube (CRT), the LCD has been commercially used as a display device for a portable devices, including laptop personal computers (PC).
FIG. 1 is a view of a portable LCD of a related art. The portable LCD includes an LC panel 2, and a gate driver 4 and data driver 6 for driving the LC panel 2. The LC panel 2 has a display part 10 for displaying data.
The display part 10 includes a first gate line group of GL1˜GLn and a second gate line group of GLn+1˜GL2n arranged thereon with data lines DL1˜DLm arranged perpendicularly to the first and second gate line groups of GL1˜GL2n. The first gate line group of GL1˜GLn and the data lines DL1˜DLm define pixel regions and TFTs are arranged on the pixel regions.
To optimize space on a portable LCD, the gate driver 4 and the data driver 6 can be arranged on one side of the LCD. For example, referring to FIG. 1, the gate driver 4 and the data driver 6 can be arranged on the lower side of the LC panel 2.
The gate driver 4 can be mounted on a gate tape carrier package (TCP) and the data driver 6 can be mounted on a data TCP. The gate TCP and the data TCP are electrically connected to the LC panel 2.
In this case, the first gate line group of GL1˜GLn disposed on the display part 10 extends to the left, then downward, along the left edge of the LC panel 2, extending therefrom to a gate driver 4.
The second gate line group of GLn+1˜GL2n disposed on the display part 10 extends to the right, then downward, along the right edge of the LC panel 2, extending therefrom to a gate driver 4.
The data lines DL1˜DLm disposed on the display part 10 extend downward to the data driver 6 disposed on the lower side.
The extending first and second gate line groups GL1˜GL2n and the extending data lines DL1˜DLm have pads formed on their ends. The pads are connected to the gate TCP and the data TCP.
FIG. 2 is a sectional view of the portable LCD of FIG. 1, taken along a line A-A′. The first gate line group 20 of GL1˜GLn is formed on the substrate 11; a gate insulation layer 21 is formed on the substrate 11 and on the first gate line group 20 of GL1˜GLn. The data lines 18 of DL1˜DLm are formed on the gate insulation layer 21 and are perpendicular to the first gate line group 20 of GL1˜GLn.
The data lines DL1˜DLm connected to the data driver 6 (FIG. 1) overlap with the first gate line group of GL1˜GLn connected to the gate driver 4 (FIG. 2). The data lines 18 of DL1˜DLm have a passivation layer 19 thereon. Since the length of the first gate line group 20 of GL1˜GLn is long and the data lines 18 of DL1˜DLm are formed on the first gate line group 20 of GL1˜GLn, capacitance is generated between the first gate line group of GL1˜GLn and the data lines DL1˜DLm.
FIG. 3 is a sectional view of the portable LCD of FIG. 1, taken along a line B-B′. Referring to FIG. 3, the second gate line group 20 of GLn+1˜GL2n is formed on the substrate 11 and a gate insulation layer 21 is formed on the substrate 11 and on a second gate line group 20 of GLn+1˜GL2n. The insulation layer 21 has a passivation layer 19 thereon. In this case, the data lines DL1˜DLm are not formed on the second gate line group 20 of GLn+1˜GL2n. Since the second gate line group 20 of GLn+1˜GL2n and the data lines DL1˜DLm do not overlap, capacitance is not generated in the second gate line group 20 of GLn+1˜GL2n. 
Moreover, since the length of the first gate line group of GL1˜GLn is longer than that of the second gate line group of GLn+1˜GL2n, line resistance is greater in the first gate line group of GL1˜GLn than in the second gate line group of GLn+1˜GL2n. In view of the line resistances in the first and second gate line groups and the capacitance generated in the first gate line group 20 of GL1˜GLn, there is a characteristic delay associated with a scan signal supplied to the first gate line group of GL1˜GLn and another characteristic associated delay associated with a scan signal supplied to the second gate line group of GLn+1˜GL2n. The delays in scan signal transmission may cause a defect in image quality in which a horizontal line appears at the boundary between the first gate line group of GL1˜GLn and the second gate line group of GLn+1˜GL2n. 